Employment-Based Analog Layout Design Training
The course is aligned with industry standards, Singapore Government Subsidies and job assurance.
Progress your career in the sought-after semiconductor industry.
In Partnership With
Confidently gain a job in the flourishing industry
Apply for a comprehensive hands-on training course and get ready to transform into an Analog Layout Design Engineer.
Analog Layout Design?
The pandemic has fueled the growing shortage of semiconductor chips which has ultimately opened the way for plenty of jobs in the industry. Our job-ready curriculum and 100% placement assistance helps you leap into the industry with skill and confidence.
100% Placement Assistance
Interactive Online Sessions
Govt Subsidy and Grants*
Hands - On Knowledge
on Industrial Standards
45 days – 30 days of intense training with 15 days of a mini block project
11 October 2021
Monday to Friday
9:30 AM to 4:30 PM (SGT)
6:30 PM to 10:00 PM (SGT)
9:30 AM to 4:00 PM (SGT)
*Click/tap Elaborate course to know more
Interactive Live Online Sessions
Lab access through VPN
Application Assessment Process
1. Register on this page
2. Screening based on commitment
3. E2i form submission
4. Government assessment
5. Top 20 finalists will be shortlisted
Eligibility & Prequisites
1. Fresh Graduates from Diploma/ BE / BTech / MTech (ECE, EEE, CSE) / MSc Electronics
2. Engineers with 1-2 years of experience, eager to get into Analog Layout Design
1. Working knowledge of Linux
2. Knowledge of Digital Electronics fundamentals.
3. Knowledge of CMOS Fundamentals and ASIC flow is an added advantage
4. Commitment to learn and develop skills in Analog layout design
Essentials of UNIX/Linux
- Linux/UNIX OS, Shell
- Working with files, directories
- Commonly used commands
- Conductor, Semiconductor & Insulators =( Intrinsic & Extrinsic) Semiconductor.
- Basic Passive and Active devices.
- Ohms law, Kirchoff laws
- Basic of circuit understanding
CMOS & FINFET Basics
- MOSFET Basics, Operations, few simple circuits & second order effects.
- MOSFET Detailed fabrication process.
- FinFET working, Fabrication, advantages & disadvantages.
- Layout Editor Tool
- Understanding the schematic symbols and parameters
- Creating and managing libraries and cell
- Commands for Layout editing.
- Commands for schematic editing.
- Verification : DRC and LVS
- Antenna effect, latchup, Electromigration, IR Drop
- Analog Layout of OpAmp, Current Mirror, PLL, ADC, and DAC
- Resistor, Capacitor layout techniques
- CMOS and BiCMOS layout techniques
- Standard Cell Layout : Inverter, AND, OR, NAND, NOR, AOI, OAI, Latches, and Flop
Advanced Layout Concepts
- Mismatches & Matching.
- Failure Mechanism : Electro migration, IR drop, LOD & Stress effects, WPE, Antenna Effects, Latch up, ESD (with High voltage rules, EOS effects).
- Noises & Coupling.
- Different Types of process – Advantages & Disadvantages – Planar CMOS, FD-SOI, SOI, Bi-CMOS, Gallium Arsenide, Silicon-Germanium, Finfet.
- Full Chip Construction, Scribe Seal, Pad Frame, Integration and guidelines.
Standard cell, IO, and Memory Layout
- Std Cell & Memories.
- IO Layout Guidelines : High speed IOs and High Speed Interfaces.
- Sense amplifier & Bit cell development
- Why memory layout different than analog layout
- Memory layout flow
- Types of memory layout (SRAM/DRAM/ROM)
- Introduction to SRAM memory layout
- Fixing few manually created leaf-cell errors which impact
- Impact of IR, EM and DFM
- SRAM memory design architecture
- Words line and address line
- SRAM rows and column design
- Building blocks of SRAM
- Memory Bit cell
- Row decoder
- Word line driver
- Sense amplifier
- Control block
- Misc digital logic.
- Pitch Calculation for blocks.
- Power Planning
Analog and Mixed signal Layout
- High speed Analog Layout
- RF Layout guidelines with Transmission lines and inductor concepts
- Handling clocks
- Analog Circuits & Layout guidelines
- Single & Multi stage differential opamp layout
- current mirror layout
- PLL, DLL and Oscillators
- LDO and other regulators
- ADCs & DACs
- Bandgap, Temperature sensors & Biases -> Current & Voltage bias lines
- input pair, differential routing, Power routing, offset minimizing
- Power/Signal IR Drop
- cross-talk and coupling
- Electrostatic Discharge
- Deep Submicron Layout Issues
- Shallow Trench Isolation (LOD)
- Well Proximity Effect.
Assignments and hands on projects
- Assignments and multiple hands on projects
- Best Practices & Interview Questions
Know what others generally clarify with us
Frequently Asked Questions
Will I receive a certification after completing a course?
Yes, you will receive a Certificate of Completion at the end of the course. 100 % Attendance is mandatory to complete the course.
What are the chances of me getting placed after the course?
A career coach will be assigned to you and will advise you or will work closely with you in assisting for placement with the company’s own clients. You will also get advice on resume writing and interview scenarios.
What is the duration of this programme?
Can I apply if I am a foreigner in Singapore?
Are there prerequisites or language requirements?
Prerequisites: Working knowledge of Linux, Knowledge of digital electronics fundamentals & Knowledge of CMOS fundamentals and ASIC flow is an added advantage.